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Micrel, Inc.
3.3V, 2.0GHz ANY DIFFERENTIAL IN-TO-LVDS SY89876L Precision Edge(R) PROGRAMMABLE CLOCK DIVIDER AND SY89876L 1:2 FANOUT BUFFER W/ INTERNAL TERMINATION
Precision Edge(R)
FEATURES
Integrated programmable clock divider and 1:2 fanout buffer Guaranteed AC performance over temperature and voltage: * >2.0GHz fMAX * <190ps tr / tf * <15ps within device skew Low jitter design: * <10psPP total jitter * <1psRMS cycle-to-cycle jitter Unique input termination and VT Pin for DC- and ACcoupled inputs; CML, PECL, LVDS and HSTL LVDS-compatible outputs TTL/CMOS inputs for select and reset Parallel programming capability Programmable divider ratios of 1, 2, 4, 8 and 16 Low voltage operation 3.3V Output disable function -40C to 85C industrial temperature range Available in 16-pin (3mm x 3mm) MLF(R) package
DESCRIPTION
This low-skew, low-jitter device is capable of accepting a high-speed (e.g., 622MHz or higher) CML, LVPECL, LVDS or HSTL clock input signal and dividing down the frequency using a programmable divider ratio to create a lower speed version of the input clock. Available divider ratios are 2, 4, 8 and 16, or straight pass-through. The differential input buffer has a unique internal termination design that allows access to the termination network through a VT pin. This feature allows the device to easily interface to different logic standards. A VREF-AC reference is included for AC-coupled applications. The /RESET input asynchronously resets the divider. In the pass-through function (divide by 1) the /RESET synchronously enables or disables the outputs on the next falling edge of IN (rising edge of /IN).
TYPICAL PERFORMANCE APPLICATIONS
SONET/SDH line cards Transponders High-end, multiprocessor servers
OC-12 to OC-3 Translator/Divider
FUNCTIONAL BLOCK DIAGRAM
S2 (TTL/CMOS)
CML/LVPECL/LVDS 622MHz Clock In
Divide-by-4
LVDS 155.5MHz Clock Out
/RESET (TTL/CMOS)
Enable FF Enable MUX MUX
622MHz In
IN
Q0 /Q0
IN 50 VT 50 /IN S1 (TTL/CMOS) S0 (TTL/CMOS) VREF_AC Divided by 2, 4, 8 or 16
Q1 /Q1
/IN Q0
155.5MHz Out
Decoder
/Q0
Precision Edge is a registered trademark of Micrel, Inc. MicroLeadFrame and MLF are registered trademarks of Amkor Technology, Inc. M9999-020707 hbwhelp@micrel.com or (408) 955-1690
Rev.: D Amendment: /0
1
Issue Date: February 2007
Micrel, Inc.
Precision Edge(R) SY89876L
PACKAGE/ORDERING INFORMATION
VCC GND S0 S1
Ordering Information(1)
Part Number
12 11 10 9
16
15
14
13
Package Operating Type Range MLF-16 MLF-16 MLF-16 MLF-16 Industrial Industrial Industrial Industrial
Package Marking 876L 876L 876L with Pb-Free bar-line indicator 876L with Pb-Free bar-line indicator
Lead Finish Sn-Pb Sn-Pb Pb-Free NiPdAu Pb-Free NiPdAu
Q0 /Q0 Q1 /Q1
1 2 3 4 5 6 7 8
IN VT VREF-AC /IN
SY89876LMI SY89876LMITR(2) SY89876LMG(3) SY89876LMGTR(2, 3)
NC
S2
/RESET
VCC
16-Pin MLF(R) (MLF-16)
Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package is recommended for new designs.
PIN DESCRIPTION
Pin Number 12, 9 1, 2, 3, 4 16, 15, 5 6 8 Pin Name IN, /IN Q0, /Q0 Q1, /Q1 S0, S1, S2 NC /RESET, /DISABLE Pin Function Differential Input: Internal 50 termination resistors to VT input. Flexible input accepts any differential input. See "Input Interface Applications" section. Differential Buffered LVDS Outputs: Divided by 1, 2, 4, 8 or 16. See "Truth Table." Unused output pairs must be terminated with 100 across the different pair. Select Pins: See "Truth Table." LVTTL/CMOS logic levels. Internal 25k pull-up resistor. Logic HIGH if left unconnected (divided by 16 mode.) Input threshold is VCC/2. No Connect. LVTTL/CMOS Logic Levels: Internal 25k pull-up resistor. Logic HIGH if left unconnected. Apply LOW to reset the divider (divided by 2, 4, 8 or 16 mode). Also acts as a disable/enable function. The reset and disable function occurs on the next high-to-low clock input transition. Input threshold is VCC/2. Reference Voltage: Equal to VCC-1.4V (approx.). Used for AC-coupled applications only. Decouple the VREF-AC pin with a 0.01F capacitor. See "Input Interface Applications" section. Termination Center-Tap: For CML or LVDS inputs, leave this pin floating. Otherwise, See Figures 4a to 4f "Input Interface Applications" section. Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitor. Ground. Exposed pad must be connected to the same potential as the GND pin.
10 11 7, 14 13
VREF-AC VT VCC GND, Exposed pad
TRUTH TABLE
/RESET(1) 1 1 1 1 1 0(1)
Note: 1. Reset/Disable function is asserted on the next clock input (IN, /IN) high-to-low transition. M9999-020707 hbwhelp@micrel.com or (408) 955-1690
S2 0 1 1 1 1 X
S1 X 0 0 1 1 X
S0 X 0 1 0 1 X
Outputs Reference Clock (pass through) Reference Clock /2 Reference Clock /4 Reference Clock /8 Reference Clock /16 Q = LOW, /Q = HIGH Clock Disable
2
Micrel, Inc.
Precision Edge(R) SY89876L
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) .................................. -0.5V to +4.0V Input Voltage (VIN) .................................. -0.5V to VCC+0.3 ECL Output Current (IOUT) Continuous ......................................................... 50mA Surge ................................................................ 100mA Input Current IN, /IN (IIN) .......................................... 50mA VT Current (IVT) ...................................................... 100mA VREF-AC Sink/Source Current (IVREF-AC), Note 3 ....... 2mA Lead Temperature (soldering 20 sec.) ...................... 260C Storage Temperature (TS) ....................... -65C to +150C
Note 1.
Operating Ratings(Note 2)
Supply Voltage (VCC) ...................................... +3.3V 10% Ambient Temperature (TA) ......................... -40C to +85C Package Thermal Resistance MLF(R) (JA) Still-Air ............................................................. 60C/W 500lfpm ............................................................ 54C/W MLF(R) (JB), Note 4 Junction-to-Board ............................................ 32C/W
Note 2. Note 3. Note 4.
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions for extended periods may affect device reliability. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. Due to the limited drive capability use for input of the same package only. Junction-to-board resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB.
DC ELECTRICAL CHARACTERISTICS(Notes 1, 2)
TA= -40C to +85C; Unless otherwise stated. Symbol VCC ICC RIN VIH VIL VIN VDIFF_IN |IIN| VREF-AC
Note 1. Note 2. Note 3. Note 4. Note 5. Note 6.
Parameter Power Supply Power Supply Current Differential Input Resistance (IN-to-/IN) Input High Voltage (IN, /IN) Input Low Voltage (IN, /IN) Input Voltage Swing Differential Input Voltage Swing Input Current (IN, /IN) Reference Voltage
Condition
Min 3.0
Typ
Max 3.6
Units V mA V V V V
No load, max. VCC 90 Note 2 Note 2 Note 3 Note 4 Note 2 Note 5 0.1 - 0.1 -0.3
75 100 - - - - -
100 110 VCC+0.3 VCC+0.2 1.8
45
mA V
VCC-1.525 VCC-1.425 VCC-1.325
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. Specification for packaged product only. Due to the internal termination (see Figure 2a) the input current depends on the applied voltages at IN, /IN and VT inputs. Do not apply a combination of voltages that causes the input current to exceed the maximum limit! See "Timing Diagram" for VIN definition. VIN (Max) is specified when VT is floating. See "Typical Operating Characteristics" section for VDIFF definition. Operating using VIN is limited to AC-coupled PECL or CML applications only. Connect directly to VT pin.
M9999-020707 hbwhelp@micrel.com or (408) 955-1690
3
Micrel, Inc.
Precision Edge(R) SY89876L
LVDS DC ELECTRICAL CHARACTERISTICS(Notes 1, 2)
VCC = 3.3V 10%; RL = 100 across the outputs; TA = -40C to +85C; Unless otherwise stated. Symbol VOUT VOH VOL VOCM VOCM
Note 1. Note 2. Note 3. Note 4.
Parameter Output Voltage Swing Output High Voltage Output Low Voltage Output Common Mode Voltage Change in Common Mode Voltage
Condition Note 3, 4 Note 3 Note 3 Note 4
Min 250
Typ 350
Max 400 1.475
Units mV V V
0.925 1.125 -50 1.375 50
V mV
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. Specification for packaged product only. Measured as per Figure 3a, 100 across Q and /Q outputs. Measured as per Figure 3b.
LVTTL/CMOS DC ELECTRICAL CHARACTERISTICS(Notes 1, 2)
VCC = 3.3V 10%; TA = -40C to +85C; Unless otherwise stated. Symbol VIH VIL IIH IIL
Note 1. Note 2.
Parameter Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current
Condition
Min 2.0
Typ
Max
Units V
0.8 -125 20 -300
V A A
The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. Specification for packaged product only.
M9999-020707 hbwhelp@micrel.com or (408) 955-1690
4
Micrel, Inc.
Precision Edge(R) SY89876L
AC ELECTRICAL CHARACTERISTICS(Notes 1)
VCC = 3.3V 10%; RL = 100 across the outputs; TA = -40C to +85C; Unless otherwise stated. Symbol fMAX tPD tSKEW tRR Tjitter tr,tf
Note 1. Note 2. Note 3. Note 4. Note 5.
Parameter Maximum Input Frequency Differential Propagation Delay IN to Q Within-Device Skew (diff.) Part-to-Part Skew (diff.) Reset Recovery Time Cycle-to-Cycle Jitter Total Jitter Rise/Fall Time (20% to 80%)
Condition VOUT 200mV Input Swing < 400mV Input Swing 400mV Note 2 Note 2 Note 3 Note 4 Note 5
Min 2.0 590 540
Typ 2.5 690 640 5
Max
Units GHz
870 820 15 280
ps ps ps ps ps
600 1 10 60 110 190
psRMS psPP ps
Measured with 400mV input signal, 50% duty cycle, all outputs loaded with 100 across each output pair, unless otherwise stated. Skew is measured between outputs under identical transitions. See "Timing Diagram." Cycle-to-cycle jitter definition: the variation in period between adjacent cycles over a random sample of adjacent cycle pairs. Tjitter_cc = Tn-Tn+1, where T is the time between rising edges of the output signal. Total jitter definition: with an ideal clock input of frequency fMAX, no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value.
TIMING DIAGRAM
/RESET
VCC/2 tRR
IN VIN /IN VIN Swing /Q VOUT Swing Q tPD
M9999-020707 hbwhelp@micrel.com or (408) 955-1690
5
Micrel, Inc.
Precision Edge(R) SY89876L
TYPICAL OPERATING CHARACTERISTICS
VCC = 3.3V, RL = 100 across the output; TA = 25C, unless otherwise stated.
350 300 Q AMPLITUDE (mV) 250 200 150 100 50 0 0
Q Output Amplitude vs. Frequency
PROPAGATION DELAY (ps) 0.5 1 1.5 2 2.5 3 FREQUENCY (MHz) 3.5
700
IN to Q Propagation Delay vs. Input Swing
675
650
625
600 100
300
500
700
900
1100
INPUT SWING (mV)
800 PROPAGATION DELAY (ps) 750 700 650 600 550
IN to Q Propagation Delay vs. Temperature
OUTPUT DUTY CYCLE (%)
60
Output Duty Cycle vs. Frequency
55
50
45
500 -60 -40 -20 0 20 40 60 80 100 TEMPERATURE (C)
40 0
500 1000 1500 2000 2500 3000 FREQUENCY (MHz)
M9999-020707 hbwhelp@micrel.com or (408) 955-1690
6
Micrel, Inc.
Precision Edge(R) SY89876L
TYPICAL OPERATING CHARACTERISTICS (Continued)
VCC = 3.3V, VIN = 100mV, RL = 100 across the output; TA = 25C, unless otherwise stated.
622MHz Output
1.25GHz Output
Output Swing (50mV/div.)
TIME (300ps/div.)
Output Swing (50mV/div.)
TIME (130ps/div.)
2.5GHz Output
Output Swing (50mV/div.)
TIME (80ps/div.)
DEFINITION OF SINGLE-ENDED AND DIFFERENTIAL SWINGS
VIN, VOUT 350mV (typical)
VDIFF_IN, VDIFF_OUT 700mV (typical)
Figure 1a. Single-Ended Swing
Figure 1b. Differential Swing
M9999-020707 hbwhelp@micrel.com or (408) 955-1690
7
Micrel, Inc.
Precision Edge(R) SY89876L
INPUT INTERFACE APPLICATIONS
VCC
VCC
1.86k
1.86k
25k S0 S1 S2 /RESET
R
1.86k IN 50 VT 50 /IN GND
1.86k
R
GND
Figure 2a. Simplified Differential Input Buffer
Figure 2b. Simplified TTL/CMOS Input Buffer
LVDS OUTPUTS
LVDS (Low Voltage Differential Swing) specifies a small swing of 350mV typical, on a nominal 1.25V common mode above ground. The common mode voltage has tight limits to permit large variations in ground between an LVDS driver and receiver.
vOD vOH, vOL vOH, vOL
100 1%
50, 1% vOCM, vOCM
50, 1%
GND
GND
Figure 3a. LVDS Differential Measurement
Figure 3b. LVDS Common Mode Measurement
M9999-020707 hbwhelp@micrel.com or (408) 955-1690
8
Micrel, Inc.
Precision Edge(R) SY89876L
INPUT INTERFACE APPLICATIONS
VCC
VCC
VCC
VCC
VCC
VCC
IN CML /IN SY89876L GND NC NC VT VREF_AC
0.01F GND VCC CML
IN
IN PECL VCC
SY89876L
/IN
/IN SY89876L GND VT VREF_AC NC
VT VREF_AC
0.01F
Rb 50
Figure 4a. DC-Coupled CML Input Interface
Figure 4b. AC-Coupled CML Input Interface
Figure 4c. DC-Coupled PECL Input Interface
VCC
VCC
VCC
VCC
VCC
VCC
IN PECL /IN Rpd 100 Rpd 100 VCC GND GND 0.01F VT VREF_AC SY89876L
GND NC NC LVDS
IN
IN /IN SY89876L
HSTL /IN SY89876L GND VT NC VREF_AC
VT VREF_AC
GND
Figure 4d. AC-Coupled PECL Input Interface
Figure 4e. LVDS Input Interface
Figure 4f. HSTL Input Interface
RELATED PRODUCT AND SUPPORT DOCUMENTATION
Part Number SY89873L Function 3.3V, 2.5GHz Any Diff. IN-to-LVDS Programmable Clock Divider/Fanout Buffer w/ Internal Termination MLF(R) Application Note HBW Solutions New Products and Applications Data Sheet Link http://www.micrel.com/product-info/products/sy89873l.shtml
http://www.amkor.com/products/notes_papers/mlf_appnote.pdf http://www.micrel.com/product-info/products/solutions.shtml
M9999-020707 hbwhelp@micrel.com or (408) 955-1690
9
Micrel, Inc.
Precision Edge(R) SY89876L
16-PIN MicroLeadFrame(R) (MLF-16)
Package EP- Exposed Pad
Die
CompSide Island
Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane
PCB Thermal Consideration for 16-Pin MLF(R) Package (Always solder, or equivalent, the exposed pad to the PCB) Package Notes: Note 1. Note 2. Package meets Level 2 moisture sensitivity classification, and are shipped in dry-pack form. Exposed pads must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL
+ 1 (408) 944-0800
FAX
+ 1 (408) 474-1000
WEB
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated. M9999-020707 hbwhelp@micrel.com or (408) 955-1690
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